Data Analyzer 308

The 308 is a 20 MHz, four-in-one portable Data Analyzer. It provides Parallel Timing, Parallel State, Serial State and Signature Analysis.


Signal Inputs
Parallel Timing & State
Multliine probe-tip, 8 Data lines, 1 clock & 1 ground lead.
Maximum Number of Inputs: 8
Input Impedance: 1 MΩ, 5 pF

Logic Swing
Minimum: 500mV +2% of threshold voltage p.p. centered on threshold  voltage.
Maximum: ±40V or less, to at least threshold voltage Maximum Non-destructive Input Voltage: -40V to +40V
Width of Data input: Minimum 10ns, with 400mV overdrive from threshold voltage

Threshold Voltage — Selectable
TTL: +1.4v to +0.2 volts
VAR: -12 volts to +12 volts

Input mode — selectable
Sample or Latch (to 5ns with 500mV overdrive voltage)

Serial State
Single channel probe Input
Input Impedance: 10 MΩ, 13 pF

Nondestructive Maximum Input Voltage:
500 V peak at probe tip
250 peak at bnc input connector

Logic Swing
Minimum: 500mV +2% of threshold voltage, peak-topeak centered about the threshold
Maximum: ±30V peak
Selectable Parity: ODD, EVEN or NONE
Selectable Bits Per Character: 5, 8, T or 8 bits (includes parity if active).

Selectable Input logic: Positive or Negative (at probe tip)
Synchronizing Word (Synchronous mode only): Programmable to require two equal words. It not programmed defaults to ASCII word SYN.

Hunt Word (Synchronous Mode Only): Programmable to require one word. If not programmed, defaults to "XXXXXXXX" (Not defined). One Hunt word is equal to 3 Hexadecimal "FF"s (Line idles).

Stop Bits (ASYNC ONLY): Responds to one or more

Signature Analyzer
Single channel data input via probe: 10MΩ; 13pF Clock start, and stop Inputs provided by Data Acquisition probe.

Clock
Parallel Timing & State
External Clock: Period Minimum 50 ns

Pulse Width, Minimum: High-Logic Level: 24.5ns;  Low-Logic Level:  24.5ns
Data Setup Time, minimum: 25ns
Data Hold Time, minimum:    0ns
Internal Clock: 20 MHz
Sample Interval, minimum: 50ns

Data Pulse Width to ensure sampling
Minimum: 1 sample interval +10ns
Sample Intervals: 50ns to 200ns/sample in 1-2-5 sequence

Qualifier Input
Selectable Trigger or Clock
Input Threshold: TTL Level +1.4V ± 0.2 volts
Maximum Input Voltage: -5V to +10 V peak

Memory
8 x 252 bits Data Acquisition Memory
8 x 252 bits Reference Memory
 

Here you find 7 models, 7 with images and 1 with schematics for wireless sets etc. In French: TSF for Télégraphie sans fil.
All listed radios etc. from Sony-Tektronix, Tokyo